1. Field of Invention
This invention relates to circuits that operate at microwave frequencies and more particularly to an oscillator circuit.
2. Description of the Prior Art
An oscillatory tendency of a field effect transistor (FET) is typically expressed in terms of Rollet's stability factor (k). See J. M. Rollet "Stability and Power-Gain Invariants of Linear Two-Ports", IRE Transactions on Circuit Theory, Vol. CT 9, pp. 29-32, March, 1962. When the stability factor is greater than unity, the FET is unconditionally stable. An FET operated in a common source circuit configuration, for example, usually has a stability factor greater than unity.
When the stability factor is less than unity, the FET is potentially unstable. Because of the potential unstability, a combination of a load impedance and a source impedance of the FET can be selected to induce oscillation. When the FET tends to oscillate at microwave frequencies, it is suitable for use in an oscillator circuit.
The FET inherently dissipates power in direct relation to power delivered to a load. Hence, the power delivered by the oscillator is limited by the amount of power the FET can safely dissipate.
The FET typically has a gallium arsenide substrate with an N-type active region. As known to those skilled in the art, gallium arsenide has a high thermal resistance compared with the thermal resistance of a typical metal heat sink. Because of the high thermal resistance, it is difficult to conduct heat through the substrate to a heat sink. Therefore the thermal resistance of the substrate limits the power that the FET can safely dissipate.
Increased amounts of heat are conducted from the substrate by either making the substrate as thin as practical and plating it with metal or providing an increased spatial separation between elements of the FET. However, either plating the thin substrate or increasing the spatial separation of the elements increases the complexity of construction of the FET.
Alternatively, the heat may be conducted from the surface of the substrate where the heat is generated by mounting the FET in a type of heat sink known as a flip-chip carrier. The flip-chip carrier is referred to and shown in the article, "Thermal Resistance of GaAs Power FETs" by H. C. Huang, F. N. Sechi and L. S. Napoli in the Proceedings of the Sixth Biennial Cornell Electrical Engineering Conference (1977). To understand the mounting in the carrier, it should be understood that the FET is comprised of a plurality of unit transistors with the substrate common to all of the unit transistors.
An exemplary unit transistor includes three elements, one of which is a thin metal deposition, known as a unit gate, that forms a Schottky barrier junction with the substrate. The other two elements are each a thin metal deposition in ohmic contact with the substrate. The other two elements are known as a unit drain and a unit source, respectively. Typically the gate is symmetrically located with respect to the inner edges of the ohmic contact elements.
The total area on the substrate utilized by the unit sources is greater than the area utilized by either the unit gates or the unit drains. Therefore, the heat is most effectively conducted from the substrate when it is connected to the carrier through the unit sources. The connection to the carrier preferably does not include a wire lead, since the lead may introduce an undesired inductance.
The unit sources are easily connected to the carrier when they have a layer of metal plating, thereby providing plated unit sources with surfaces that have a displacement from the substrate greater than the displacements of the surfaces of the unit gates and the unit drains. The FET is mounted with the surfaces of the plated unit sources in contact with a flat surface of the carrier. Because the surfaces of the plated unit sources have a greater displacement from the substrate than the surfaces of the unit gates and unit drains, the flat surface does not make contact with either the unit gates or the unit drains. The carrier is typically connected to a ground plane, whereby all of the unit sources form a grounded source electrode of the FET.
Usually, all of the unit drains are connected together by a metal deposition on the substrate. Additionally, all of the unit gates are connected together by a metal deposition on the substrate. However, the unit sources are not connected together by a metal deposition; they are only connected together through the carrier. Because the substrate has the N-type active region, the unit gates and unit drains are biased negative and positive, respectively, relative to ground, to cause a bias current to flow from the unit drains to the unit sources. The unit gates, unit drains and unit sources are referred to as a gate electrode, a drain electrode and a source electrode, respectively.
When the FET is mounted in the carrier, it is particularly suited for use in a common source circuit configuration because the unit sources form the grounded electrode. When the FET is in the common source configuration and has a stability factor greater than unity, the FET is not suitable for use in an oscillator. However, an oscillator circuit where an FET is mounted in a flip-chip carrier is described in the Technical Note, "X-Band Reverse Channel GaAs FET Power VCO" by Paul C. Wade in Volume 21, No. 4, April, 1978 issued of Microwave Journal, page 92.
Harmonic and noise content of a signal provided by an oscillator is inversely related to the Q of a resonator portion of the oscillator. The resonator often includes a varactor that is operable to change the resonant frequency of the oscillator. Typically, the varactor is lossy and thereby lowers the Q of the resonator.
Heretofore, easily constructed power oscillators that utilize a field effect transistor mounted in a flip-chip carrier have not been known in the prior art. Additionally, the instability of the field effect transistor has hever been utilized to increase the Q of a resonator included in an oscillator.